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SN54ABT863的技术资料
SN54ABT863的技术资料
来源：
深圳市雅信发电子有限公司
发布日期：2009/4/16 15:54:08
SN54ABT863的产品特征：
State-of-the-Art EPIC-ΙΙB(TM) BiCMOS Design
Significantly Reduces Power Dissipation Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25° C
High-Impedance State During Power Up and Power Down
High-Drive Outputs (–32-mA I , 64-mA I )
Latch-Up Performance Exceeds 500 mA Per
ESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB) Packages, and Thin Shrink Small-Outline (PW), Ceramic Chip Carriers (FK), Plastic (NT), and Ceramic (JT) DIPs
SN54ABT863的技术参数：
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, V I(except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . .. . –0.5 V to 5.5 V
Current into any output in the low state, IO : . . . . . . . . ............... . . . . . SN54ABT863 96 mA.
SN74ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (V< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . 104°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
NT package . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150 °C
SN54ABT863的产品描述：
The ’ABT863 devices are 9-bit transceivers designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA) inputs.
The outputs are in the high-impedance state during power up and power down. The outputs remain in the high-impedance state while the device is powered down.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 VCC, OE should be tied to V through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
State-of-the-Art EPIC-ΙΙB(TM) BiCMOS Design
Significantly Reduces Power Dissipation Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25° C
High-Impedance State During Power Up and Power Down
High-Drive Outputs (–32-mA I , 64-mA I )
Latch-Up Performance Exceeds 500 mA Per
ESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB) Packages, and Thin Shrink Small-Outline (PW), Ceramic Chip Carriers (FK), Plastic (NT), and Ceramic (JT) DIPs
SN54ABT863的技术参数：
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, V I(except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . .. . –0.5 V to 5.5 V
Current into any output in the low state, IO : . . . . . . . . ............... . . . . . SN54ABT863 96 mA.
SN74ABT863 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (V< 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . 104°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
NT package . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150 °C
SN54ABT863的产品描述：
The ’ABT863 devices are 9-bit transceivers designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic levels at the output-enable (OEAB and OEBA) inputs.
The outputs are in the high-impedance state during power up and power down. The outputs remain in the high-impedance state while the device is powered down.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 VCC, OE should be tied to V through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
